There are many kinds of charge/discharge protection circuits used for a lithium ion secondary battery. FIG. 3 is a block diagram depicting a semiconductor apparatus and a protection circuit provided inside a battery pack using the semiconductor apparatus.
As shown in FIG. 3, a semiconductor apparatus (charge/discharge protection circuit) 1005, being a main part of a battery pack 1010, includes an overcharge protecting circuit 1011 (dedicated to a battery cell 1001), another overcharge protecting circuit 1013 (dedicated to a battery cell 1002), an overdischarge detecting circuit 1012 (dedicated to the battery cell 1001), another overdischarge detecting circuit 1014 (dedicated to the battery cell 1002), a discharge overcurrent detecting circuit 1015, a charge overcurrent detecting circuit 1016, an oscillating circuit 1017, a counter circuit 1018, a logic circuit 1019, another logic circuit 1023, a level shift circuit 1020, a short circuit detecting circuit 1021, a delaying circuit 1022, a delay time reducing circuit 1024, and a standby circuit 1026. Furthermore, in FIG. 3, reference numeral 1003 indicates a charger, reference numeral 1000 indicates a charge controlling FET, and reference numeral 1200 indicates a discharge controlling FET.
The standby circuit 1026 is connected to a V-terminal. In order to save power, the standby circuit 1026 is configured to disconnect the power supply by switching off the switches provided in the paths that supply power to each internal circuit in a case where a standby state is detected.
Next, a basic operation conducted by the semiconductor apparatus (charge/discharge protection circuit) is described in a case where overcharge, overdischarge, discharge overcurrent, charge overcurrent, or short-circuiting is detected.
When overcharge, overdischarge, discharge overcurrent, charge overcurrent, or short-circuiting is detected by the overcharge detecting circuits 1011, 1013, the overdischarge detecting circuits 1012, 1014, the discharge overcurrent detecting circuit 1015, the charge overcurrent detecting circuit 1016, or the short-circuit detecting circuit 1021, respectively, the oscillating circuit 1017 begins to oscillate and the counter circuit 1018 begins counting.
When the counter circuit 1018 counts a predetermined delay time upon the detection of overcharge or charge overcurrent, the Cout (Charge output) becomes a low (L) level via the logic circuit (e.g., latch) 1019 and the level shift circuit 1020, to thereby switch off the charge controlling FET 1000. When the counter circuit 1018 counts a predetermined delay time upon the detection of overdischarge, discharge overcurrent, or short-circuiting, the Dout (Discharge output) becomes a low (L) level via the logic circuit 1023, to thereby switch off the discharge controlling FET 1200.
The charger 1003 is connected to the battery pack 1010. Accordingly, when a charging current is supplied to the battery pack 1010, the source voltage of the charge controlling FET 1100 becomes lower than the source voltage of the discharge controlling FET 1200. The source voltage of the discharge controlling FET 1200 corresponds to the voltage of a Vss terminal of the semiconductor apparatus 1005. Although a resistor is connected to a V-terminal of the semiconductor apparatus 1005, the source voltage of the charge controlling FET 1100 is substantially equal to the voltage of the V-terminal since the V-terminal has high impedance.
Therefore, when a charging current is supplied to the battery pack 1010, the voltage of the V-terminal becomes lower than the voltage of the Vss terminal. When the voltage of the V-terminal becomes a predetermined amount (charge overcurrent detection voltage) lower than the voltage of the Vss terminal, a charge overcurrent is detected and the Cout becomes a low level. Thereby, the charge controlling FET 1100 is switched off. A relationship of the charge overcurrent “I”, the charge overcurrent detection voltage “Vchgdet”, and the ON resistances “Ron1”, “Ron2” of the discharge controlling FET 1200 and the charge controlling FET 1100 is expressed as follows.I=Vchgdet/(Ron1+Ron2)
Next, functions and circuitry of the delay time reducing circuit 1024 are described. Since the delay time is typically 1 second or more when overcharge is detected by the overcharge detecting circuits 1011, 1013, the delay time leads to the problem of increasing the time for testing, for example, the semiconductor apparatus or a protection circuit (not shown).
In order to shorten the testing time, a predetermined signal (e.g., −3V), which is usually not applied to the −V terminal, is applied to the delay time reducing circuit 1024 during a testing mode for testing, for example, the semiconductor apparatus or the protection circuit. Alternatively, a testing signal may be provided in the delay time reducing circuit 1024 so that a testing signal can be directly applied to the delay time reducing circuit 1024. By applying the predetermined signal to the delay time reducing circuit 24, the oscillating circuit 1017 outputs higher frequency, to thereby shorten the delay time. As a result, testing time can be shortened. Although this configuration of the delay time reducing circuit is effective when overcharge, overdischarge, discharge overcurrent, or charge overcurrent is detected, it is particularly effective for a case of detecting overcharge where delay time is long.
The oscillating circuit 1017 may be configured as a ring oscillator using a constant current inverter and a capacitor. Since the oscillation frequency of the ring oscillator is determined by the constant current of the constant current source, the capacity of the capacitor, and the threshold of the constant current inverter, delay time can be shortened by, for example, increasing the constant current of the constant current source, substantially reducing the capacity of the capacitor, or changing the threshold of the constant current inverter.
Alternatively, in order to shorten the delay time, there is also a method of changing the position of extracting output from the counter circuit 1018. The circuitry and operations of a related art example of a charge/discharge protection circuit are described in, for example, Japanese Laid-Open Patent Application No. 2002-176730.
The conditions for recovering from overdischarge are different depending on whether the charge/discharge protection circuit is a latch type or an overdischarge recovery type. In a case of the latch type, when the voltage of plural serially connected secondary batteries becomes equal to or greater than an overdischarge detection voltage, an overdischarge detection signal changes from a low (L) level to a high (H) level on condition that a charger is connected to the charge/discharge protection circuit. In a case of the overdischarge recovery type, an overdischarge detection signal changes from a low (L) level to a high (H) level regardless of whether a charger is connected to the charge/discharge protection circuit when the voltage of plural serially connected secondary batteries becomes equal to or greater than an overdischarge recovery voltage.
In a case where a charger is connected to a charge/discharge protection circuit having plural serially connected secondary batteries where overdischarge of one of the secondary batteries is detected, it is necessary to switch off a charge controlling FET of the charge/discharge protection circuit when overcharge of another one of the plural secondary batteries is detected.
However, in order to switch off the charge controlling FET, it is necessary to recognize the detection of overcharge of the other one of the plural secondary batteries even where overdischarge of the one of the plural secondary batteries is detected. In order to achieve such recognition, it is necessary to keep the charge/discharge protection circuit including its detecting circuits operating to some degree.
However, in order to keep the charge/discharge protection circuit operating, it becomes necessary to maintain a standby current flowing in the charge/discharge protection circuit even after the overdischarge is detected. This necessity results in undesired constant consumption of power. In addition, the flow of the standby current after the detection of overdischarge leads to degradation of the secondary batteries.